Dr Riboy Cheriyan

Dr Riboy Cheriyan
Dr Riboy Cheriyan

Dr Riboy Cheriyan

Designation : Professor & HOD
Education : M.Tech., Ph.D.,
Professional Experience 
Teaching : 17 yrs

Research: 7 yrs

Specialization :

UG : Electronics & Communication
PG : Applied Electronics
Ph.D : Communication 

Publication 

  • Clock Sharing Double Edge Triggered Flipflop-International Journal of Soft Computing
  • Comparative Study of Ultra Wide Band Antennas-International Journal of Computer Applications
  • RF Energy Harvesting System And Rectennas-International Journal of Scientific and Engineering Research
  • Pulse Triggered Flipflop design with Conditional Pulse Enhancement-International Journal of Scientific and Engineering Research
  • Design and Analysis of Power and Area Efficient 2/3 Prescaler Using E-TSPC Logic-International Journal of Scientific and Engineering Research
  • ASIC Based Design of High Speed Parrallel MAC Based on Radix – 4  and Radix – 8 Booth Encoding-International Journal of Scientific and Engineering Research
  • A Novel Design of Elliptic Infinite Impulse Response Low Pass Filter for Fading Channel Simulator based on Filter Approach-International Journal of Innovative Research in Science, Engineering and Technology
  • A Dynamic reconcile Algorithm for Address Generator in Wimax Deinterleaver-International Journal of Innovative Research in Science, Engineering and Technology
  • Filter Centered Nonisotropic Fading Channel Archetypal for Wireless system Assessment-International Journal of Innovative Research in Science, Engineering and Technology
  • A proficient design of Adaptive Modulation scheme Supportive Address Generator for WiMAX Deinterleaver -International Journal of Engineering Research and Technology
  • High Speed Adder – Multiplier unit with S-MB Recoding-Journal of Science, Technology and Management  0974-8334
  • FPGA Implementation of An Efficient High Speed Wallace Tree Multiplier-International Journal of Computer Applications
  • Low Overhead Internal Scrubbing Technique for Virtex-5 Configuration upsets-International Journal of Science Technology and Engineering
  • High Speed Adder-Multiplier Unit with S-MB Recoding- International Journal of Advanced Research in Electrical, Electronics and Instrumentation Engineering
  • Investigations on Ultra wideband Probe fed slotted hexagonal patch antenna for wireless communications-Middle- East journal of Scientific Research
  • A Coplanar Waveguide Fed Hexagon Slotted  Hexagonal Patch Antenna for Ultra Wideband Applications-International Journal of  Applied Engineering Research
  • Effect of Reflecting Sheet on the back of strip line fed slotted Hexagonal Patch Antenna-International Journal of Scientific and Engineering Research
  • Low Cost Ultra-Wide Band Antenna for Radar Application – A Comparison of Two Designs -International Journal of Science Technology and Engineering
  • Supply Voltage Variations on Full Adder Delay-NCVCom-07
  • Double Edge Triggered Flip flop using Clock Branch Sharing Technique for  Low Power Applications-NCSSS-08
  • Low Energy Double Edge Triggered Flip flop using CBS  Technology-ICVLSI 2008
  • Double Edge Triggered Flip flop using Clock Branch Sharing Technique for  Low Energy Applications-NCVCom -08
  • Comparative Study of Ultra wide band antennas-ICVCI 2011
  • Investigations on Hexagonal Slot Ultra wide  band antennas-ICGITS 2013
  • High Speed Interpolator with Combined Filter-NCVLES-14
  • High Speed Interpolator with fast adder-ICCICCT 2014
  • Proficient Receptive Combined Address Generator Archetypal for WiMAX and WiFi Deinterleaver Precinct-ICCICCT 2014
  • High Speed address generating design for the dynamic scheme supportive WiMAX deinterleaver-AICERA 2014
  • Adept Spectral Filter for Fading Nonisotropic Channel Model-ICCICCT 2014
  • Proficient Envelope Shaping Filter for Fading Wireless Channel Estimation-AICERA 2014
  • A novel adaptive algorithm for address generator  supporting varying modulation schemes in WiMAX  Deinterleaver-IMCIET 2014
  • A Novel HDL Design of Fading Wireless Channel Simulator based on Filter Approach-IMCIET 2014
  • Low Overhead SEU Controller for Virtex-5 Configuration Upsets-3rd Conference on Solid State Circuits 2015
  • Effect of Reflecting Sheet on the Back of CPW fed Slotted Hexagonal Patch Antenna-ICMEST-2016
  • Effect of Reflecting Sheet on the Back of Probe fed Slotted Hexagonal Patch Antenna for Wireless Applications-ICEMS-2016

Participations

  • Two week ISTE workshop on CMOS Mixed VLSI & RF Design- IIT Kharagpur
  • TEQIP –II sponsored one week FDP on Advances in Wireless Communication and Networking.
  • Workshop on Signal Processing in VLSI System Design
  • Two week ISTE workshop on Signals & Systems
  • One week Workshop on Fractals and Wavelets
  • IEEE Workshop on Antenna Design Using HFSS
  • Evaluator of Accreditation
  • Two week ISTE workshop on Signals & Systems
  • Faculty Development Programme on Instructional Design and delivery System
  • STTP on Methodology and software for Research
  • Two – week ISTE short term training program on Modeling and Optimization Techniques in Engineering

Memberships

IETE

ISTE

Research interest

Communication- signal processing , Antenna Design

Achievements

  • Question Paper setter – Kongu Engineering College, Tamil Nadu & 
  • Question Paper setter – Cochin University of science & Technology, Kochi
  • Conference Chair – NCCWiN 2014
  • Resource Person for the National workshop at MBCET Trivandrum- Janaury 2015
  • Conference Chair- International Conference on Recent Trends in Engineering and Material Sciences , Jaipur National University, Jaipur during March 17-19, 2016.
  • Reviewer – International Conference on Next Generation Intelligent Systems 2016 , Rajiv Gandhi Institute of Technology, Kottayam .
  • Resource person for the workshop on “System Design using  Verilog HDL” at Viswa Jyothi College of Engineering, Thodupuzha