Dr Shajimon K John

LATEST UPDATES

120 Students of Saintgits College of Engineering and 22 Students of Saintgits College of Applied Sciences placed in Infosys
Department of Corporate Economics will hold a National Seminar on “Economics Slowdown of India” in December 2019.
Congratulations Saintgits Chess Women’s Team – KTU C Zone Intercollegiate Chess Tournament Champions
Saintgits wins the prestigious IDA – STEM Award for Community Development.
National Seminar by Business Administration Department on the theme “Unleash Entrepreneurship in Trade & Commerce”  will be held on December 11, 2019.
Ms. Angel Baby and Ms. Gayathri R. from final year BCA of Saintgits College of Applied Sciences bagged the first placement offers in the new campus recruitment season. Both of them placed as Associate Analyst in Deloitte.
Dr Shajimon K John
Dr Shajimon K John

Dr Shajimon K John

Designation : Vice Principal (Academic Coordination)
Education : Ph.D
Professional Experience 
Teaching : 18 yrs

Specialization :

UG : Electronics & Communication Engineering
PG : Applied Electronics
Ph.D : Electronics & Communication Engineering

Publication 

  • Image Processing Techniques for Vegetation study-Retrospective ,International Journal on Computer Applications
  • Majority Logic Fault Detection with Difference-Set Codes for Memory Applications-International Journal of Emerging Technologies in Computational and Applied Sciences
  • 10 bit Delta Sigma D/A Converter with Increased S/N ratio using Compact Adder Circuits-International Journal of Scientific and Engineering Research
  • MODULO 2n + 1 MAC UNIT- Int. Elec & Electr.Eng & Telecoms. 2013
  • Comparative Study on the Vegetation Spread Using Vegetation Index over Kerala with Remote Sensed Images- International Journal of Applied Environmental Science
  • Study on The Vegetation Index Over Kerala, India In Relation to the Rainfall Pattern-Journal of Environmental Science & Engineering
  • Biometric System for Voter Identification -International Journal of Advanced Research in  Electrical, Electronics and Instrumentation Engineering
  • An ISO 3297: 2007 Certified Organization Vol. 4, Special Issue 1 Gate engineering of double gate In 0.53 Ga 0.47As TUNNEL FET-ICTACT Journal on Microelectronics
  • Power Spectral Density Computation using Modified Welch Method-International Journal of Science Technology and Engineering
  • Comparative study on Silicon and Germanium Doping-less Tunnel FET-IJSTE
  • Impact of doping in Gate All Around Nanowire TFET-IJAREE
  • Lossless Image Compression with Projection Based and Adaptive Reversible Integer Wavelet Transform-NCAEE,2005
  • Adaptive Wavelet Transform with Context Modelling for Image Compression-NCETEC, 2005
  • Lossless Image Compression Based on optimal prediction, Adaptive Lifting and Arithmetic Conditional Coding-CONET, 2005
  • Generalized Reversible Integer To Integer Transform Framework-NCRTC, 2005
  • Bit Level Multipliers-NCSIP, 2007
  • Bit Level Arithmetic Architecture-NC-VCOM, 2007
  • High speed matrix multiplier based on two level matrix decomposition-ICMS 2007
  • DFT Techniques for Opens in CMOS Latches-ICAC, 2008
  • New Technique for fault detection in Quantum Cellular Automata-ICETET,2008
  • Design and Implementation of Reconfigurable LFSR-ICVCom,2009
  • Vegetation Indices an Efficient Method for Crop Monitoring-Annual Research Congress 2010
  • Implementation of  data converter with increased SNR and reduced  number of  transistors-National Conference on VLSI and Embedded Systems Technology and Advancements, VESTA2012
  • Image Processing Techniques for Vegetation Study-Retrospective-ICVCI 2011, Annual Research Congress 2012
  • Implementation of an Area Efficient data Converter with Increased effective number of bits-ISDA, 2012
  • 10 Bit Delta Sigma D/A Converter with Increased Signal to Noise Ratio Using Compact Adder circuits-International Conference on Global Innovations in Technology and Sciences (ICGITS- 2013)
  • Low power glitch free dual output coarse digitally controlled delay lines-ICACCS, 2013
  • Gate Engineering of Double Gate In 0.53Ga0.47 As Tunnel FET-3rd Conference on Solid State Circuits 2015
  • Dual Metal Gate all around nanowire TFET with Hetero Dielectric: A TCAD study-4th conference of Solid state circuits
  • A DCVS level shifter using self adapting pull up network-4th conference of Solid state circuits
  • Level shifter with self-controlled current limiter-4th conference of Solid state circuits
  • Implementation of an area efficient data converter with increased effective number of bits- IEEE Xplore Digital Library

Participations

  1. Digital Signal Processors, Bannari Amman Institute
  2. Embedded Systems, Saintgits College of Engineering
  3. Computer Applications, Academic Staff College
  4. Electromagnetic Filed Theory, Saintgits College of Engineering
  5. ARM Processor, Saintgits College of Engineering
  6. Research Trends in Embedded Systems & Signal Processing, Saintgits College of Engineering
  7. Satellite Image Processing ,IIT Bombay
  8. MATLAB, Kochi
  9. Continuing Education Congress,TIST, Kochi
  10. Geoinformatics, SEUF, Trichur
  11. Continuing Education Congress, SJCET, Pala
  12. Industry Academia Collaboration, College of Engg, Pune
  13. Evaluator of Accreditation, Saintgits College of Engineering
  14. Signals and Systems, Saintgits College of Engineering
  15. External Academic Auditor of KTU, Gurudeva Institute of Science & Tech.,Kottayam and College of Engg., Aranmula
  16. One day workshop on ‘Patent Information and Drafting for R&D and Industry’ jointly organised by Mar Athanasios College for Advanced Studies Tiruvalla & Patent Information Centre-Kerala/KSCSTE
  17. Mar Athanasios College for Advancced Studies Tiruvalla 17 Awareness Training Programme on “Migration to SciLab” organized by the International Centre for Free and Open Swource Software (ICFOSS) in association with KTU, College of Engineering, Trivandrum.

Memberships

  • ISTE
  • IEEE
  • IEEE-SSCS

R & D Projects

  • InGaAs/GaAsSb Heterojunction TFET for Realization of Energy Efficient Complementary Logic Circuit (Project ID : PG2015030 )- Funded by IE(I)
  • Analysis of gate all around tunnel field effect transistor using TCAD (15/SPS55/ 2015/ KSCSTE)-Funded by KSCSTE
  • Analysis of dopingless hetrojunction tunnel field effect transistor using TCAD(16/SPS55/ 2015/ KSCSTE )-Funded by KSCSTE

Research interest

  • Image Processing
  • VLSI Signal Processing

Quick Contact

SAINTGITS COLLEGE OF ENGINEERING

Kottukulam Hills, Pathamuttom
PO Kottayam, Pin – 686532, Kerala

Tel: +91 481 2430349, 2436169, 2436170

Email: mail@saintgits.org

For Admission please contact:
Anju Anna Jacob
Admissions Officer
+91 9895903278, +91 8129702585
anjukakkad@saintgits.org

Quick Facts

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