Dr. Ajith Ravindran

Designation: Asst. Professor (Selection), SSCS Chapter Advisor

Education:  Ph. D., M.Tech, B.Tech, M.B.A

Professional Experience
Teaching: 12 Years 2 Months

Specialization
UG  : Electronics & Communication Engineering
PG  : VLSI & Embedded Systems

Ph.D.:  Optical MEMS 

M.B.A: Operations Management

Publication 
International Journals

  1. Ajayan, J., Sreejith, S., Manikandan, M., Sreenivasulu, V. B., Kumari, N. A., & Ravindran, A. (2024). An intensive study on organic thin film transistors (OTFTs) for future flexible/wearable electronics applications. Micro and Nanostructures, 207766. (SCI Indexed: IF- 3) 
  1. Ravindran, A., Nirmal, D., Pinkymol, K. P., Prajoon, P., Ajayan, J., & Chander, S. (2022). Theoretical study of TiO2 based UV–VIS spectrometer gratings for assessment of skin lesions in localized scleroderma. Optik, 270, 170033. (SCI Indexed: IF- 2.84)
  2. Ravindran, A, D. Nirmal, K. P. Pinkymol, P. Prajoon, and J. Ajayan. “InGaAs based gratings for UV–VIS spectrometer in prospective mRNA vaccine research.” Optical and Quantum Electronics 54, no. 9 (2022): 1-15. (SCI Indexed Impact Factor: 2.794).
  1. Ravindran, A., Nirmal, D., Prajoon, P. and Rani, D.G.N., 2020. Optical Grating Techniques for MEMS-Based Spectrometer – A Review. IEEE Sensors Journal, 21(5), pp.5645-5655.(SCI Indexed- Impact Factor:4.325)
  1. Shilpa, K.S., Ravindran, A. and Saranya, P.M., Design Of Standard Cell Asic’s Using Self Gated Resonant Clocked Flip Flop, ICTACT Journal on Microelectronics, July 2017 Volume: 3 , Issue: 2
  1. Jose, J., Ravindran, A. and Nair, K.K., A Highly Sensitive Heterojunction Photodetector for UV Application., International Journal of Engineering Research and Technology (IJERT, ISSN: 2278-0181 IJERTV5IS090580 Vol. 5 Issue 09, September-2016.
  1. Nair, K.K., Jose, J. and Ravindran, A., 2016. Analysis of temperature dependent parameters on solar cell efficiency using MATLAB. International journal of Engineering development and research, 4, pp.536-541.
  1. Varghese, A., Praveen, C.S., Mani, A.P. and Ravindran, A., In GaAs/GaAsSb Heterojunction TFET., IJCA – International Journal of Computer Applications – IJCA, pp. 207-212, 2015, ISBN: 973-93- 80888-56-6.
  1. Praveen, C.S., Ravindran, A., John, S.K. and Abe, S., Gate Engineering Of Double Gate In0. 53ga0. 47as Tunnel FET., ICTACT Journal on Microelectronics, October 2015, Volume: 01, Issue: 03
  1. Praveen C S , Ajith Ravindran , Shajimon K John , Arathy Varghese and Ancy P Mani, Impact of Doping in Gate All Around Nanowire TFET., International Journal of Advanced Research in Electrical, Electronics and Instrumentation Engineering, Vol. 4, Issue 11, November 2015
  1. Praveen, C.S., Ravindran, A. and Varghese, A., 2015. Analysis of GAA tunnel FET using Matlab,  IJCA – International Journal of Computer Applications, 975, p.8887.
  1. Sudheer, A. and Ravindran, A., 2015. Design and implementation of embedded logic flip-flop for low power applications. Procedia Computer Science, 46, pp.1393-1400.
  1. Ravindran, A., 2014. Design & Implementation of Embedded Logic Flip-Flop in 180nm Technology. International Journal of Engineering Research, 3(6).
  1. Thomas, A., Jose, S.H., Prasad, A. and Ravindran, A., 2014. Speed control of a DC motor using fractional order proportional derivative (FOPD) control. International Journal of Engineering Research and Technology, 3(1), pp.3460-3464.
  1. Ajith Ravindran, Soya Treesa Jose, Pradeep C., A 1.5V Area Efficient Asynchronous Adder using MODL and Double Pass Transistor Logic., International Journal of Scientific & Engineering Research, Volume 4, Issue 8, August 2013 ISSN 2229-5518

Book Chapter

  1. Book Chapter titled “Double Gate High Electron Mobility Transistors “ in Handbook for III-V high electron mobility transistor technologies. Nirmal D, Ajayan J, editors, CRC Press; 2019 May 14. https://doi.org/10.1201/9780429460043

International Conference

  1. Ravindran, Ajith, D. Nirmal, Binola. K. Jebalin. I. V, K. P. Pinkymol, P. Prajoon, and J. Ajayan. “Investigation on Impact of GaAs and GaN Blazed Grating for High Performance UV-VIS Spectrometer” in 3rd International Conference on Electronics and Sustainable Communication Systems (ICESC 2022).
  2. Ravindran, A., Nesamani, F.P. and Nirmal, D., 2018, December. A study on the use of spectroscopic techniques to identify food adulteration. In 2018 International Conference on Circuits and Systems in Digital Enterprise Technology (ICCSDET) (pp. 1-6). IEEE.
  3. James, R.M. and Ravindran, A., 2018, March. Review of Full Adder Performance Analysis Using Kogge Stone Adder And Magnetic Tunnel Junction. In 2018 4th International Conference on Devices, Circuits and Systems (ICDCS) (pp. 84-90). IEEE.
  4. Joseph, T.S. and Ravindran, A., 2014, July. Implementation of non-volatile 4× 4 4T1D DRAM cell in 0.18 μm technology. In 2014 International Conference on Control, Instrumentation, Communication and Computational Technologies (ICCICCT) (pp. 435-439). IEEE.

Patents

  1. Indian Patent with title “Non Destructive Technique for The Detection of Artificially Ripened Mango Using Machine Learning”. Application Number : 202141028306 A, Filed date : 26.06.2021, Publication Date : 09.07.2021

Positions of Responsibility

  1. Programme Coordinator, Department of Electronics (VLSI Design and Technology), Period – September 2023 to till Date.
  2. Lab In-charge –VLSI Design Lab, Department of Electronics, Period – January 2013 to till Date.
  3. IEEE SSCS Student Branch Advisor, Saintgits College of Engineering, June 2014 – till date.
  4. Coordinator, Tailor Made Course in IC Design, Department of Electronics, Period – February 2017 to till Date.
  5. Coordinator, IIRS Outreach Programme, ISRO, Saintgits College of Engineering, June 2020 – till date.
  6. Coordinator, Industry Institute Interaction, Department of Electronics, Period – February 2022 to till Date.
  7. Coordinator, National Level Project Competition – SRISHTI 2025

Participations

Workshop/Seminars Attended

  1. Three-Day Training Program on “Basic Training Program in Nano Science and Technology” supported by the Ministry of Education (MoE), Govt. of India, from 13th March 2023 to 15th March 2023, organized by the Centre for Nano Science and Engineering, Indian Institute of Science, Bangalore.
  2. One Week Online Faculty Development Program on “Numerical Simulation and Analysis with COMSOL Multiphysics” from 13th  June to 18th  June, 2022 Organized by, SVERI’s College of Engineering, Pandharpur, Maharashtra.
  3. NPTEL-AICTE FDP on the course “Infra Red Spectroscopy for Pollution Monitoring” August, 2018  to September, 2018.
  4. Two-day Workshop on “Design, Development and launching of MOOC” conducted by leadingIndia.ai, a nation wide initiative by Bennett University, Greater Noida, India 7th  December, 2018   to 8th December, 2018.
  5. Five days training programme for faculties and research scholars on “MathWorks training on Machine Learning with MATLAB, Control System Design with MATLAB and Simulink, and Embedded Coder” 7th   January, 2019 to  11th  January, 2019.
  6. Short Term course on “Microelectronics: from Fundamentals to Devices” by IIT Madras from 11th to 16th July 2016.
  7. National workshop on Advanced Nano scale device design using TCAD at Chenganur Engg. College from 28th December 2015 to 1st January 2016
  8. IETE sponsored FDP on Embedded Design Using ARM & ARDUINO by SAINTGITS College of Engineering from 18th to 24th Nov 2015.
  9. FDP on CAD tools in VLSI & Communication by SAINTGITS College of Engineering from 28th Nov 2014 to 5th Dec 2015
  10. INUP hands on training on Solar Cell Fabrication by IIT Bombay from 17th  to 22nd Nov 2014.
  11. IETE Sponsored  National Level Faculty Development Programme on CAD Tools in VLSI & Communication by SAINTGITS College of Engineering from 28th November 2014 to 5th December 2014.
  12. INUP workshop on Nanofabrication technologies by IIT Bombay from 26th  to 28th  May 2014.
  13. Five day FDP on CMOS Design by NIT, Calicut from 19th  June 2013 to 24th  June 2013 .

As resource Person

  1. Hands on Training on Digital Design using Xilinx by CEK, Kidangoor
  2. Hands on Training on OrCad PCB Design by Saintgits  IEEE SB
  3. ATAL FDP  on “Role of Semiconductor Devices and Artificial Intelligence in Chip Design,” held from 2nd December 2024 to 7th December 2024.
  4. Tailor Made Course in IC Design Conducted by IEEE SSCS.
  5. Hands on workshop on “Familiarization of ASIC and FPGA Design ” on 24th  and 25th  of February 2023 by IEEE SSCS Kerala Chapter.

Events Organized

  1. Coordinator – Distinguished Lecture by Dr. Jacob Baker for IEEE members under IEEE Kerala Section., 2013
  2. Coordinator – Three-day Workshop & Conference on Solid State Circuits funded by IEEE SSCS- 2014
  3. Coordinator – Second Conference on Solid State Circuits funded by IEEE SSCS, 2014
  4. Mentor – Synopsys Design Contest 2014
  5. Coordinator – Third Conference on Solid State Circuits funded by IEEE SSCS, 2015
  6. Coordinator – IEEE SSCS Sponsored Tailor Made Course in IC Design, 2017 onwards
  7. Programme committee member IEEE international conference on circuits, systems and digital enterprise technology (ICCSDET), 2018
  8. Coordinator – Workshop on Modeling and Simulation of MEMS Using Intellisuite Software, 2018
  9. IEEE Day Ambassador for the IEEE Day Celebrations 2018 under IEEE Kerala Section, 2018
  10. Co – Coordinator – National level Project Exhibition and Competition – Srishti 2018
  11. Coordinator –Distinguished Lecture Programme by Dr. Yong Ping Xu, Professor, National University of Singapore (NUS), 2019
  12. Coordinator – Distinguished Lecture by Dr. Keith A Bowman, Qualcom Technoogies, USA, 2020
  13. Program Coordinator – B.Tech in Electronics Engineering (VLSI Design and Technology)
  14. Hands on workshop on “Familiarization of ASIC and FPGA Design” on 24th and 25th of February 2023.
  15. Co – Coordinator – National level Project Exhibition and Competition – Srishti 2024
  16. Five Day Faculty Development Programme (FDP) on the topic “Antenna and IC Design Flow using Ansys HFSS and Cadence EDA Tools” from 29th  January 2024. 
  17. Chair – Ph. D Forum, IEEE International Conference on Recent Advances in Systems Science and Engineering (RASSE 2023).
  18. Coordinator – National level Project Exhibition and Competition – Srishti 2025

Membership

  • IEEE Senior  Member – SM -91160629
  • IE(I) Associate Member – AM158597-8
  • IEEE SSCS Member – 91160629

Research Interest

  • Physical Design and Verification
  • ASIC Design and Verification
  • Low Power Digital IC Design
  • Optical MEMS

R & D Projects

  1. Extending 4T1D Non-Volatile Concept in 0.18um Technology, August 2014
  2. Design & Implementation of Embedded Logic Flip-flop in 180nm CMOS Technology, August 2014
  3. InGaAs/GaAsSb Heterojunction TFET for the Realization of Energy Efficient Complementary Logic, August 2015 
  4. Analysis of gate all around tunnel field effect transistor using TCAD, August 2015
  5. Analysis of dopingless Hetrojunction tunnel field effect transistor using TCAD, August 2015
  6. Performance analysis of Photon Enhanced Thermionic Emission, August 2016
  7. A study for performance enhancement of hetero junction photo detectors, August 2016
  8. Reliability Enhancement of Low Power True Single-Phase Clocking Flip-Flop, March 2017
  9. Low Voltage Digital ECG Acquisition System, March 2019
  10. Handheld Device for the Detection of Artificially Ripened Fruits and Chemically Treated Vegetables, June 2020
  11. Investigation towards the use of Spectroscopic Techniques and Chemometrics in the Rapid Identification of Coconut Oil Adulteration, 2021
  12. Design and Simulation of Spectrometer Gratings for Biomedical Applications, 2022

Achievement

  1. Elected as Vice Chair, IEEE RFID Council Kerala Section, 2025
  2. Elected as Chair Educational Activities, IEEE SSCS Kerala Chapter, 2025
  3. Elected as Chair – IEEE SSCS Kerala Chapter for 2022 – 2024.
  4. Received IEEE SSCS Extra chapter Subsidy of  $2950  in the year 2024
  5. Received IEEE SSCS Extra chapter Subsidy of  $2000  in the year 2023
  6. Received funding of Rs. 45000/- from CERD under Research Promotion Scheme for the project titled “ Investigation towards the use of Spectroscopic Techniques and 
  7. Chemometrics in the Rapid Identification of Coconut Oil Adulteration”, in 2021.
  8. Selected as Evaluator for  Toycathon 2022, by Ministry of Education’s Innovation Cell.
  9. Received funding of Rs. 4,16,000/-  for the project titled “Handheld Device for the Detection of Artificially Ripened Fruits and Chemically Treated Vegetables” under APJ Abdul Kalam Youth Challenge Program from the Kerala State Council for Science Technology & Environment. (Funding No: 100/2017/KSCSTE dated 10/05/2017).
  10. Received IEEE SSCS chapter Subsidy of  $1500  in the year 2019
  11. Received funding of Rs.50,000/- for the project titled “InGaAs/GaAsSb Heterojunction TFET for Realization of Energy Efficient Complementary Logic Circuit” from Institution of Engineers India.
  12. Received funding of Rs. 10,000/- for the project titled ” Analysis of gate all around tunnel field effect transistor using TCAD” from KSCSTE, 2017. 
  13. Received funding of Rs. 10,000/- for the project titled ” Analysis of dopingless heterojunction tunnel field effect transistor using TCAD” from KSCSTE, 2017.
  14. Received IEEE SSCS Extra chapter Subsidy of  $3500  in the year 2016
  15. Received IEEE SSCS Extra chapter Subsidy of $3250 in the year 2014
  16. Received IEEE SSCS Extra chapter Subsidy of $4389 in the year 2013
  17. Best Paper Award – National Conference on VLSI and Embedded Systems Technology and Advancements, VESTA2012.

Contact Details

Phone: +91- 8606432966

Email: ajith.ravindran@saintgits.org