Dr. Sreekala K S

Designation: Asso. Professor (Special) &  HoD

Education:  Polytechnic Diploma, AMIE, M. Tech., Ph. D.              

 Total Teaching: 19.6 Yrs.

Publication  (latest come first in IEEE format)
International Journals

1. Arun T. S., Bhavana Rajesh Pillai, Devapriya L.,  Javad Iqbal, and Sreekala K. S, “Automated Hydroponics for Agricultural Applications,” International Journal on Emerging Research Areas, Vol.3(1), pp.100-106, 2023.
2. Amanda Sara Philip and Sreekala K. S., “Impact of Single Event Transient Effects on Adiabatic Logic Circuits,” Materials Today: Proceedings, Vol.58, pp.339-344, 2022, https://doi.org/10.1016/j.matpr.2022.02.242.
3. K. S. Sreekala and S. Krishnakumar, “State Retained Dual-V_th Feedback Sleeper-Stack for Leakage Reduction” IET Computers and digital techniques, vol.13, pp. 1-10, January 2019.(SCI-E, Impact Factor: 0.803 ), DOI: 10.1049/iet-cdt.2018.0009.
4. Sheena Varkey, Gokul Sarath, Sneha P Elias, Sneha Saji and Sreekala K S, “Intelligent Helmet for Accident and Alcohol Detection,” Int. Research Journal of Engineering and Technology, Vol. 7, June 2020. 
5.  Betti Reji, Sreekala K.S., et.al.,” Smart self Defense Security System for Women,” Journal of Switching Hub, Vol. 4(3), pp.13-17, 2019.
6. Jisha Varghese, and Sreekala K. S,” Clock-Gating: A novel method for reducing dynamic power dissipation on FPGA,” International Journal of Engineering Research & Technology, Vol. 8(5), pp. 917-922, May 2019.
7.  Sreekala K. S. and S. Krishnakumar, “Leakage Estimation of SRAM cell based on Node Voltage and Current Characterization”, International Journal of Pure and Applied Mathematics, vol.118(7), pp. 101-109, Jan.2018, (Scopus)
8.  Jeny Elasa Joji, Sreekala K. S. and Ashly John, “FinFET based Ultra Low Power SRAM ” International Journal of Engineering Research & Technology ”, Vol. 7(04), pp. 226-229, April-2018.
9. Preena Prasad, Marie K James and Sreekala K. S., “Survey on Artificial Neural Network in Solving Problems of Real Time Application Dealing with Image Processing and Pattern Recognition,” Int. Journal of Science and Innovative Engineering & Technology, Vol. 5, May 2018.
10. Jeny Elsa Joji, K. S. Sreekala, and P. B. Dhanusha ,”  Performance Analysis of CMOS and FinFET Based SRAM,”  Journal of VLSI Design Tools & Technology, Vol. 8 (3), pp.23-27, Dec.2018.
11.  Sreekala K. S. and S. Krishnakumar, “RNM Calculation of 6T SRAM Cell in 32nm Process Node based on Current and Voltage Information, “Indian Journal of Science and Technology, Vol.10(29), Aug.2017, (Web of Scence).
12. Sreekala. K. S and S Krishnakumar, “Subthreshold leakage reduction by Feedback Sleeper Stack Technique,” in IEEE Xplore as a part of IEEE conference ICETT at BMCE Kollam- October 2016.
13. Geethumol T. S., K. S. Sreekala, P. B. Dhanusha,” Power and area efficient 10T SRAM with improved read stability,” ICTACT Journal of Microelectronics, Vol. 3 (01), April 2017.
14. Priyanka Lee Achankunju, K. S. Sreekala K. S. and Marie K. James, “Design and read stability analysis of 8T Schmitt trigger-based SRAM,” ICTACT journal of Microelectronics, vol. 2, issue. 4, pp. 323-328, January 2017. ( UGC, Inspec Indexed)
15.  Priyanka Lee Achankunju and Sreekala. K.S., “Read Stability analysis of Low Voltage Schmitt Trigger SRAM,” IJRTER, vol. 2, issue. 5, pp. 166-175, May 2016.
16. Geethumol T.S and Sreekala. K.S, “Read Stability analysis of 6T SRAM bit cell,” IJRTER, vol. 2, pp. 155-165, May 2016.
17.  K. S. Sreekala and S. Krishnakumar, “Pattern and Position Dependent Gate Leakage and Reduction Technique,” ICTACT Journal of Microelectronics, vol. 1, issue. 3, pp. 131-135, October-2015, (UGC,Inspec Indexed)
18. Chinchu S Ragamalika, Criss Jose, Suby Maria Sojan, and Sreeakala. K. S, “Bit error Rate Tester for Wireless Communication Systems,” Int. Journal of Science Technology and Engineering, vol.2, pp. 913-916, April-2016.
19. Sreekala. K.S, Syam Gopi and Shymol  C. Mathan, “Environment and Target Simulator for Air Borne Radar,” Int. Journal of Computer Applications, pp. 31-38, 2011.

Conferences

1. Arun T. S., Bhavana Rajesh Pillai, Devapriya L.,  Javad Iqbal, and Sreekala K. S, “Automated Hydroponics for Agricultural Applications,” NACORE, at Amal Jyothi College of Engineering, Kottayam, 2023
2. Amanda Sara Philip and Sreekala K. S., “The Ramification of Single Event Transient effect on Efficient Charge Recovery Logic circuit,” IEEE sponsored Int. Conf. on Innovative Trends In Information Technology -2022, IIITK, Kottayam.
3. Amanda Sara Philip and Sreekala K. S., “Impact of Single Event Transient Effects on Adiabatic Logic Circuits,” Int. Conf. in Artificial Intelligence and Energy systems, 2021, Materials Today publication), Kottayam. 
4. Sreekala K. S. and S.  Krishnakumar, “Negative Bias Temperature Instability Benefits on Power Reduction Techniques,” IEEE Int. Conf. on Circuits and Systems in Digital Enterprise Technology (ICCSDET), Kottayam, Kerala, India, Dec. 2018(IEEE Xplore Digital Library, DOI: 10.1109/ICCSDET.2018.8821223, 2019).
5. Sreekala K. S. and S. Krishnakumar “Leakage Estimation of SRAM cell based on Node Voltage and Current Characterization,” Int. Conf. on Advances in Computer Science, Engineering and Technology, Krishnankoil, Tamilnadu Jan. 2018.
6. Jeny Elasa Joji and Sreekala K. S., and Dhanusha P B. “Compensation Technique For Low Power SRAM – A Comparative Study”, Nat. conf. on Recent Trends in Engineering Technology, Pathanamthitta, Kerala, April 2017
7. Jeny Elasa Joji and Sreekala K. S., “Compensation Technique for Low Power SRAM – A Comparative Study”, Nat. conf. on Recent Trends in Engineering Technology, Pathanamthitta, Kerala, April 2017.
8. Sreekala. K. S and S Krishnakumar, “Subthreshold leakage reduction by Feedback Sleeper Stack Technique,” Pro. of IEEE Int. Conf. on Emerging Technological  Trends, Kollam, Kerala, India, Oct.2016, IEEE Xplore, DOI: 10.1109/ICETT.2016.7873668, 2017.
9. Priyanka Lee Achankunju and K. S. Sreekala, “Design and Read Stability Analysis of 8T Schmitt trigger-based SRAM “Proc.  in IEEE Conf. on Solid State Circuits and Systems, Kottayam, Kerala, Aug. 2016.
10. Priyanka Lee Achankunju, K. S. Sreekala and Marie K. James, “Design and Read Stability analysis of 8T Schmitt Trigger based SRAM,” Proc. of IEEE Conference on Solid State Circuits and Systems, Kottayam, Kerala, India, August-2016.
11. Nihas Basheer and  K. S. Sreekala, “Power efficient multiplier using PFAL Full adder,”  Proc. of IEEE Conference on Solid State Circuits and Systems, Kottayam, Kerala, India, August-2016.
12.  Geethu Mol T. S and K. S. Sreekala, “Power and Area efficient 10T SRAM with improved Read stability,” Proc. of IEEE Conference on Solid State Circuits and Systems, Kottayam, Kerala, India, August-2016.
13. K. S. Sreekala and S. Krishnakumar, “Pattern and Position Dependent Gate Leakage and Reduction Technique,” Proc. of IEEE Conference on Solid State Circuits and Systems, Kottayam, Kerala, India, August-2016.
14. Sheeba Vinod and Sreeakla. K. S, “A comparison analysis of low power high speed logic in 0.18um technology,” Proc. of Int. Conference on Research Trends in Engineering & Management, Mount Zion College of Engineering, Pathanamthitta, July-2014.
15. Sreekala. K. S and S Krishnakumar, “Modelling of on current in a Scaled MOSFET Considering the Effect of Saturation Velocity and Temperature, “Proc. of Int. Conf. on Global Innovation in Technology and Sciences, Kottayam, Kerala, India, April- 2013.
16.   Elba Ann and Sreekala K. S, “Adiabatic switching in the sub threshold region for low power,” Proc. of IEEE Conf.on Solid State Circuits and Systems, Kottayam, Kerala, April- 2015.
17.  Sheeba Vinod and Sreekala K. S., “Low Power High Speed Logic in Adder Circuit,” Proc. of IEEE Conf. on Solid State Circuits and Systems, Kottayam, Kerala, April- 2014.
18.  Sreekala. K. S and S Krishnakumar, “Impact of Temperature and velocity Dependence on Drain   Current in MOSFET with Channel Scaling, “Proc. of NCCIE, Cochin, Kerala, India, May- 2012.
19. Sreekala. K.S, Syam Gopi and Shymol  C. Mathan,  “Environment and Target Simulator for Air Borne Radar,” Proc.of  Int. Conf. on VLSI, Communication & Instrumentation, Kottayam, Kerala, India, April- 2011.
20. Syam Gopi and Sreekala K. S.,”Wi-max stability using Vanet,” National Conf. on Emerging Trends in RF and Signal Processing, Federal Institute of Science and Technology, March 2020
21. Syam Gopi and Sreekala. K.S, “Ad-Hoc Assisted Cellular Multicast,” Proc. of Nat. Conf. on VLSI and Communication, Kottayam, Kerala, India, March. 2008.

Participations

Workshop/Seminars Attended

1. Participated in the One Week National Level Online Faculty Development Program on Outcome Based Education and Application of Generative AI in Teaching and Research,organised by St. Mary’s College (Autonomous), Thrissur, Kerala in association with the Collegiate Education Department, Government of Kerala from 17 October 2024 to 24 October 2024 and has successfully completed all the assessments and secured an A grade.
2. Two days’ workshop on Strategic Plan Preparation of the Centre of Excellence on Emerging Materials and Infrastructure, RIT Campus from 30^th August to 31^st August 2024
3. Participated in the World IP Day celebration organized by Intellectual Property Rights Information Centre (IPRIC-K), Kerala State Council for Science,Technology and Environment (KSCSTE) on April 30,2024
4. Webinar on “Journeying beyond Chip war:Unleash the Art of Chip Design” organized by Maven Silicon on the 7th October 2023. 
5. Eight Day National Level Online FDP on Research Methodology  using Chat GPT and AI Tool from 21st to 29th  September 2023, organized by PG dept. of Computer Applications, the internal quality assurance Cell and Lincoln University College Marian Research Center of Marian College Kuttikanam in association with Kerala State Higher Education Cell.
6. Two-week FDP on MATLAB & SDR Hands-on For Communication Engineering Lab from 27/2/2023 to 10/3/2023 at Amal Jyothi College of Engineering, Kanjirapally
7. FDP on “Physical Design and Verification using Cadence” at Saintgits College of Engg, ( Department of Electronics Engineering)  by Entuple Technologies, Bangalore from 14th to 16th March 2022.
8. Kerala State Council for Science, Technology and Environment – Intellectual Property Right Information Centre-Kerala (IPRIC-K) and Patent Office, Chennai, Department for Promotion of Industry and Internal Trade (DPIIT), Govt. of India jointly organized awareness programme on “Intellectual Property Rights”, at   Saintgits College of Engg. on 22nd   March 2022.
9. Webinar on “My Experience with Dr. APJ Abdul Kalam – Missile Man of India”, at Saintgits College of Engineering, on 26^th January 2022. 
10. Webinar on “Emerging Technologies for Next Generation Integrated Circuits”, at Saintgits College of Engineering, on 15^th January 2022. 
11. NPTEL –AICTE FDP on “Research Methodology” from January to April 2022. 
12. Webinar on “Nurturing Autonomy” by IQAC at Saintgits college of Engineering on 29th September 2021.
13. Webinar on “  Tunable Antenna for Space Applications” at College of Engg. Chengannur on 3^rd September 2021.
14. AICTE sponsored a five day FDP on “Inculcating Universal Human Values in Technical Education” from 17th May to 21st May 2021. 
15. ATAL Academy online FDP on “Wearable Devices” at Saintgits College of Engineering from 11st to 15th January 2021.
16. TEQIP-II FDP on Python Programming for “Computer Vision and Data Science” at TKM College of Engineering, Kollam from 28-12-2021 to 2-01-2022.
17. Webinar on “Security issues in IC design flow”, on 18th November 2020 microelectronics research group, Department of ECE, Koneru Lakshmaiah Foundation, Andra Pradesh. 
18. Webinar on “ASIC – Front End design Methodologies using Mentor Graphics EDA tools,” on 15th   April 2020 in association with CoreEL Technologies and Mentor.
19. On line panel discussion on “Post Covid Opportunities in Electronics Engineering, ” IEEE SSCS of Saintgits College of Engineering.
20. Workshop on “Research Workshop,” BIRDS (Bell Institute of Research and Development Studies), from 18th June 2020 to 22nd June 2020.
21. Workshop on “Research Methodology, Publication and Ethics,” Ramaiah Public Policy Center in Collaboration with Elsevier, on June 11th  & July 2nd , 2020
22. Webinar on “Women’s health with special reference to PCOS,” Women’s Forum of Saintgits College of Engineering, on 28th September 2020
23. International on line four days FDP on “Microsystems Design and Control Engineering,” ISTE Saintgits Chapter during 17th -20^th September 2020
24. Successively completed on line course on “FPGA computing systems: Background Knowledge and Introductory Materials,” online non-credit course authorized by politecnico di Milano through coursera  on 4th August 2020
25. IEEE-SSCS organized an Online Panel discussion on “ Post- Covid Opportunities in Electronics Engineering,” at Saingits College of Engg. On 18^th June 2020.
26. Successively completed on line course on , “Understanding research methods,” an online non-credit course authorized by University of London and SOAS University of London and offered through Coursera on 4^th December 2020
27.  Successively completed on line course on, “Research workshop,” an online non-credit course authorized by University Bell institute of research & development studies and offered through Cousera, 18^th June 22^nd June 2020.
28. Mentor Webinar on “ASIC – Front End design Methodologies using Mentor Graphics EDA tools,” on 15^th April in association with CoreEL Technologies and Mentor.
29. AICTE sponsored a four day Online Course on “Examination Reforms,” 29^th  April to 2 May 2020 at Saintgits College of Engg.
30. One-day Workshop on” Ethical Practices and Resources for Academic Writing” at 2020 Providence College of Engg. 29^th February.
31. KTU sponsored Five days FDP on” Future of Multiprocessor System: Networks – on-Chip” 16th to 20th December 2019 at Saintgits College of Engg.
32. KSCSTE ( Women Scientists Division) sponsored  Two day Workshop on  Research Methodology , Writing Practices, Language & Soft Skills” 18th and  19th  January 2019 at Saintgits College of Engg.
33. Two week ISTE STTP on CMOS, Mixed Signal and Radio frequency VLSI Design at  Indian Institute of Technology Kharagpur from 30^th January to 4^th February 2017.
34. National workshop on Advanced Nano scale device design using TCAD at College of Engg., Chenganoor from 28^th December 2015 to 1^st January 2016.
35. Two day workshop on IC design flow using Mentor Graphics tool and Vivado design tool using zed board at Sreebuddha college of Engg,patoor, from 25 to 26^th June 2015.
36. IETE sponsored a national Level faculty development programme on Embedded Design using ARM & ARDUINO at Saintgits College of Engg., from 18^th to 24^th November 2015.
37. National level workshop on Signal processing in VLSI system Design at Saintgits College of Engg., from 28^th to 30^thSeptember 2015.
38. National level faculty development program on CAD tools in VLSI & Communication at Saintgits College of Engg., from 28^th Nov-5^th December 2014.
39. Two day ISTE e-Seminar on Step2 Research at AmalJyothi Engg. College from 19-20^th September 2014.
40. National Level Faculty Development Programme On Orcad,Matlab and DSP Processor at  Saintgits College of Engg., from 2^nd to 9^th December-2013.
41. ISTE workshop on “Creative Teaching” at AmalJyothi Engg. College from 19^th to 20^th September 2014.
42. Workshop on Research Methodology: Application of Research Methods and Statistics, at IUCDS, MG University, from 28th January to 1st February-2013.
43. National Colloguiumon: Emerging areas of Research in Engineering Science at RIT Pampady from 7^th to 9^th march 2013.
44. Workshop on Research Trends ,Tools Modelling and writing Skills at Saintgits College of Engg., from 19^th to 21^st  Aril 2012.
45. National workshop on A-VIEW at AmalJyothi College Of Engg., on 14^th December-2012.
46. ISTE workshop on Solar Photovoltaic : Fundamentals, Technologies and Applications, from AmalJyothi College Of Engg., from 12^th  to 22^nd  December 2011.
47. Faculty Development Programme in Digital Logic Design Using HDL at Saintgits College of Engg., from 21^st to 22^nd  December 2010.
48. Training Programme on Professional Excellence at ST.Joseph’s College Of Engg on 10^th June 2009.
49. Short-term training Programme on Research Trends in Embedded systems and Signal Processing at Saintgits College Of Engg from 28^th October to 3^rd November 2009.
50. Faculty Development Programme in ARM processors at Saintgits College of Engg., from 4^th to 5^th January -2008.
51. Quality improvement programme on Instructional Design and delivery at SNGCE, Kadayirippu, from 21^st  to 26^th May 2007.

As resource Person

1.  Resource person for the hands on sessions of ATAL sponsored FDP on   Role of Semiconductor Device and Artificial Intelligence in Chip design on the topic “CMOS IC Design Flow: From Concept to GDSII Using Cadence Tools” 2^nd and 3^rd December 2024 at Saintgits College of Engineering, Pathaumttom, Kerala.
2. Resource person in a hands-on workshop on “Familiarization of ASIC and FPGA Design” organized by the IEEE Solid State Society, Kerala Chapter on 24th February 2023 at Saint its.
3. International Day of Women and Girls in Science organized by the Dept. of Electronics in association with IEDC MAC at Mar Augusthinose College, Ramapuram. on 13th February 2023. Chief Guest and Delivered a talk on “Role of VLSI in Daily Applications and its Scope.
4. FDP on Physical Design and Verification by CADENCE  2022 March in IEEE SSCS of Saintgits
5. IETE associated One Day Online Workshop on “LaTex for Technical Writing” at Saintgits College of Engineering. (PG, UG, and Research Scholars in and  external participants), 2022 and 2023.
6. Recourse person for Hands-on workshop on MATLAB- Programming and Simulation (2020)
7. IETE associated Two Days Online Workshop on ‘LaTeX’ at Saintgits College of Engineering. (both PG, UG, and Research Scholars) 2021

Events Organized

• Coordinator of ATAL funded FDP (Rs. 3.50000/-) on Role of Semiconductor Device and Artificial Intelligence in Chip design from 2^nd December to 7^th December. 2024
• Coordinated awareness programme on “Intellectual Property Rights” jointly organized by Kerala State Council for Science, Technology and Environment – Intellectual Property Right Information Centre-Kerala (IPRIC-K) and Patent Office, Chennai, Department for Promotion of Industry and Internal Trade (DPIIT), Govt. of India  on 22^nd   March 2022 at Saintgits College of Engg.
• Coordinated webinar on “My experience with Dr. APJ Abdul Kalam – Missile Man of India “on 26^th January 2022 Saintgits College of Engg.
• Coordinated webinar on “Emerging Technologies for Next Generation Computers” on 15^th January 2022 at Saintgits College of Engg.
• Coordinated a talk on ‘Awaken the Healer’ on 20^th February 2019 at Saintgits College of Engg.
• Coordinated One-day Women Self Defense Training Program 6^th October 2018, 31st, October 2019 respectively at Saintgits College of Engg. 
• Coordinated webinar on “Women’s health with special reference to PCOS” on 28^th September 2020 at Saintgits College of Engg.
• Coordinated KSCSTE Funded workshop on Research Methodology, Writing Practices, Language and Soft Skills (Women’s Scientist Division) from 18^th to 19^th January, 2018 at Saintgits College of Engg.
• ISTE Sponsored One Week Training Programme on ‘Research Trends in Embedded Systems and Signal Processing ’28^th October to 3^rd November -2009 at Saintgits College of Engg.

Membership

• The Indian Society for Technical Education: Life Member (LM-55264)
• The Institution of Engineers: Associate Member (A 533143-5)

Research Interest

• Low Power VLSI
• Microelectronics
• Internet of Things
• Analog VLSI Design
• Digital VLSI Design

R & D Projects

1. KSCSTE funding of Rs. 6000/- project entitled “Smart Driving System with Automatic Driver Alert & Braking Mechanism” (2017).
2. KSCSTE funding of 10,000/- project entitled “Automotive Particulate Emission Monitoring System for Sustainable Environment (APEMS)”, (2021).

Achievement

1. GATE  Score 2003 – 95.05%
2. KSCSTE funding of Rs. 40,000/- workshop on “Research methodology, Writing Practices, Language and Soft Skills” (2018).
3. Question Paper setter – Cochin University of Science & Technology, Kochi.
4. Successfully Completed 12 weeks NPTEL course on VLSI Physical design in 2017
5. Successfully Completed 8 weeks NPTEL course on CMOS digital VLSI design in 2019
6. Successfully Completed 12 weeks NPTEL course on Research Methodology in April 2022
7. Reviewer in the National Conference on Information, Communication and Intelligent Systems June 2021 at MGM College of Engineering and Technology, Ernakulam.
8. Chief Guest of International Day of Women and Girl in Science organized by the Dept. of Electronics in association with IEDC MAC at Mar Augusthinose College, Ramapuram. on 13th February 2023.
9.  Advisory Board member of NACORE 2023, at Amal Jyothi College of Engineering
10. KTU approved research supervisor 2023 onwards
11. IEEE reviewer for the third IEEE International Conference RASSE 2023 November 8-11, 2023, Kerala, India.
12. Session chair in National conference on Nacore at Amal Jyothi College of Engineering
13. ATAL FDP selected on “Role of semiconductor devices an Artificial intelligence in Chip Design “selected for an amount of Rs. 3,50,000/- AY 2024-2025.
14. Patent titled  SAFETYNET- An IoT based wireless safety system for Monitoring the Physiological and Environmental Variable in Hazardous Application published on 8/3/2024.
15. Patent filed on 7/02/2025 titled Automotive Particulate Emission Monitoring System for Sustainable Development is published on 21/2/22025.